Lecture 4: 18-11-2021

Location: D@ta

Time: 13:45 - 15:30

color coded resistors

Poll



Topics

Stationary noise model of the CS stage

Presentation

The presentation Intrinsic CS stage: Stationary noise model presents the stationary noise model of a CS stage.

Video

EE4109 2020 4_1 Intrinsic CS stage: Stationary noise model

Equivalent-input noise sources of a CS stage

Presentation

The presentation CS stage: Equivalent-input noise sources discusses the transformation of the channel noise into equivalent-input noise sources.

Video

EE4109 2020 4_2 Intrinsic CS stage: Equivalent-input noise sources

SLiCAP model of the equivalent-input noise sources of a CS stage

Presentation

The presentation CS stage: Equivalent-input noise sources - SLiCAP model presents the SLiCAP model of the equivalent-input noise sources of a CS stage.

Video

`EE4109 2020 4_3 Intrinsic CS stage: Equivalent-input noise sources SLiCAP model <https://youtu.be/-QyWqb6LNi8>_

CS stage: Noise optimization with a resistive source

Presentation

The presentation CS stage: Noise optimization with a resistive source shows the way in which the noise contribution of a CS stage can be minimized for a resistive source. LTspice examples ans SLiCAP examples are available.

Download SLiCAP-CSstage.zip and LTspice-CSstage.zip for running the analysis yourself.

Videos

  1. EE4109 2020 4_4 CS stage: Noise optimization with a resistive source

  2. EE4109 2020 4_4a CS stage: Noise optimization with a resistive source; Spice Circuit

  3. EE4109 2020 4_6 CS stage: Noise SLiCAP

  4. EE4109 2020 4_7 CS stage: Noise LTSpice

CS stage: Noise optimization with a capacitive source

Presentation

The presentation “CS stage: Noise optimization with a capacitive source” shows the way in which the noise contribution of a CS stage can be minimized for a capacitive source.

Video

EE4109 2020 4_5 CS stage: Noise optimization with a capacitive voltage source

Downloads

Quiz

Find requirements (type, W, L, \(I_{DS}\)) for a CS input stage for the active antenna.