========================================================================================= 04-12-2025: Design of application-specific multi-stage negative feedback CMOS amplifiers ========================================================================================= Lecture: EE4109-8 Location: Hall Ampere (36.HB.01.670) Time: 08:45 - 10:30 .. image:: ../../../img/colorCode.svg :alt: color coded resistors A palette with stages ===================== In the previous lectures we discussed: #. CS stage #. Balanced stages #. Feedback stages #. Balanced feedback stages We have seen that properties of balanced stages, negative feedback stages, and balanced feedback stages can easily be derived from those of the CS stage. We hereto to consider the effect design techniques (balancing and negative feedback) have on the performance aspects such as noise, drive capability, power efficiency, accuracy, bandwidth and weak nonlinearity. Design considerations ===================== .. include:: ../../../topics/ControllerDesign/ControllerDesign.rst .. include:: ../../../topics/ControllerDesign/PreferredStages.rst .. include:: ../../../topics/LPproductStages/LPproductStages.rst .. include:: ../../../topics/MillerCascode/MillerCascode.rst .. include:: ../../../topics/ControllerDesign/Interconnection.rst Design approach =============== The design approach for application-specific negative feedback amplifiers will be elucidated with the aid of the poster Design of application-specific multi-stage feedback CMOS amplifiers `_. Poster ====== #. `CMOS stages for controller design `_ #. `Design of application-specific multi-stage feedback CMOS amplifiers `_ Group exercise ============== #. Sketch multiple architectures for the signal path of the hearing-loop receive amplifier A1, using two-stage and three-stage controller architectures and discuss pros and cons of the different structures in the goup and with the instructors.