22-11-2022: Design of the noise performance of negative feedback amplifiers

Lecture: EE4109-3

Location: Pi

Time: 15:45 - 17:30

color coded resistors

Goal of this lecture

At the end of this lecture the student should:

  1. Knows the noise contributers in negative feedfack amplifiers

  2. Understands strategies and methods to minimize the noise contribution of negative feedback amplifiers

  3. Knows the noise mechanisms in CMOS transistors

  4. Can evaluate the best possible geometry and operating conditions of a CMOS stage for minimizing its noise contribution

Part 1

  1. Noise addition in negative feedback amplifiers

    1. Feedback networks

    2. Controller noise

    3. Power supply noise

  2. Design strategy low-noise negative feedback amplifiers

    1. Design of low-noise feedback configurations

    2. Design of port isolation

    3. Preferred properties of the controller’s input stage

    4. Noise impedance matching

  3. CS stage noise model

    1. Noise model of the intrinsic CS-stage

    2. Equivalent-input noise sources of the CS-stage

    3. SLiCAP CS-stage noise model

  4. Differential pair noise model

    1. Anti-series connected CS-stage

Part 2

  1. Minimization of the noise contribution of the controller’s input stage

    1. Optimization of device geometry and operating current

      1. Resistive source

      2. Capacitive source



Guided design excercises for the next lecture

  1. Find show-stopper values for the equivalent input noise sources of the active antenna’s controller

  2. Design of a low-noise input stage for the active antenna

Test your knowledge about low-noise design