Introduction#
In this chapter, we will study the amplifying capabilities of a MOS transistor. We will do this for the MOS in common-source (CS) configuration. A common-source, or CS amplifier stage is a biased MOS transistor of which the source has been taken as common terminal for both the input port and the output port. At a later stage it will become clear that all other MOS stages can be derived from the CS stage with the aid of error reduction techniques. At this stage, we will simply assume that the CS stage can be considered as the basic MOS amplifier stage.
The CS stage#
Fig. 127 shows the MOS CS stage biased as proposed in Chapter Introduction to biasing.
Fig. 127 Biased NMOS CS stage.#
The biased gate-source is the input port and the biased drain-source is the output port of the stage. In this CS configuration the source is assumed to carry no signal with respect to the bulk, however, the bias voltage of the source may differ from that of the bulk.
For an NMOS device \(V_{BS}\leq0\). For a PMOS device all polarities of the bias sources are opposite to those of an NMOS device.
This chapter#
The ideally biased CS stage from Fig. 127 will be referred to as the intrinsic CS stage. An intrinsic CS stage has no source and load connected to it. Its behavior will be studied in section The intrinsic CS stage. There, we will evaluate its transmission-1 matrix parameters \(A\), \(B\), \(C\) and \(D\). Studying the behavior of the intrinsic CS stage is helpful in understanding the source-to-load signal transfer of a CS stage driven from and terminated with finite non-zero impedances. The behavior of the CS stage between source and load will be discussed in section Small-signal behavior of CS stage between source and load. The primary focus will be on source and load impedances that consists of parallel \(RC\) networks. This is because such drive and load conditions approximate those present in many applications. However, the theory can as well be applied for other source and load types.