Modeling of the operational amplifier

Modeling of the operational amplifier#

The ongoing decrease of component dimensions and the development of high-density multi-layer printed circuit boards have lead to the development of complex printed circuit board assemblies. As a consequence, the design and production of a small number of prototypes of such PCAs have become relatively expensive. This forces designers to reduce the design risks with the aid of different design verification methods. In general, there are three design verification methods available to the designer:

  1. Numerical simulation with accurate models that incorporate statistical information

    Macro models for operational amplifiers are provided by IC manufacturers. Statistical information, however, is seldom incorporated to these models. Moreover, not all behavioral aspects that could be relevant to the design may have been modeled correctly. For this reason, the designer should investigate whether the measurement results obtained with test circuits described in the data sheet comply with the simulation results using a similar test setup. The use of macro models will be discussed in section Macro models

  2. Circuit modeling and symbolic analysis

    During the design of circuits with operational amplifiers , the designer has to investigate the influences of various performance aspects of the operational amplifiers on the behavior of the complete circuit. If the type number of the operational amplifier is known, this can be done with the aid of numerical simulation using macro-models.

    However, such simulations can only be performed after a device has been selected. Selecting a device, however, is a design decision that needs to be motivated. Searching, selecting and evaluating devices without clear performance criteria easily turns into a time-consuming trial and error scenario.

    For the formulation of clear search criteria, we need to derive and solve the so-called design equations. These equations relate the performance parameters of a device to those of the circuit that comprises that device. Derivation of the design equation requires symbolic analysis. This required models that model the performance aspects of interest as simple as possible (but not too simple). Modeling techniques for various behavioral aspects will be discussed in the following sections.

    We will discuss the modeling of the following behavioral aspects:

    1. Small-signal dynamic behavior (section Small-signal dynamic behavior)

    2. Noise behavior (section Noise behavior)

    3. PSRR and the CMRR (section PSRR and CMRR)

    4. Bias errors , offset and temperature effects (section Bias and offset quantities)

    5. Other aspects such as the current and the voltage drive capability and slew rate (section Modeling of other effects)

  3. Conducting experiments

    In many cases, elimination of the most important design risks does not require the evaluation of the complete product. The manufacturing and evaluation of relatively small proof of concepts , designed to eliminate specific design risks at an early stage of the design project, strongly facilitates the first-time-right design of the complete product.

Small-signal dynamic behavior#

Small-signal dynamic behavioral model for voltage-feedback opamps#

Table 24 Parameters of the small-signal model of the voltage-feedback operational amplifier.#

Name

Description

\(g_{d}\)

Differential-mode input conductance

\(C_{d}\)

Differential-mode input capacitance

\(g_{c}\)

Common-mode input conductance

\(C_{c}\)

Common-mode input capacitance

\(A_{v}(s)\)

Laplace transform of the voltage gain

\(Z_{o}(s)\)

Laplace transform of the output impedance

Fig. 276 shows the symbol and the small-signal dynamic equivalent model of a voltage-feedback operational amplifier. An overview of the model parameters is given in Table 24. This model suffices for evaluation of the small-signal frequency response, the small-signal step response, and the small-signal impulse response of circuits with operational amplifiers.\medskip

../_images/OpAmp-VF-Small-Signal-Model.svg

Fig. 276 Simplified small-signal model of a voltage-feedback operational amplifier.#

Common-mode rejection , power supply rejection , noise , bias current and offset current and voltage , as well as temperature effects , are not modeled. Errors due to these performance limitations will be modeled at a later stage.

Fig. 277 shows the test benches for determination of the voltage gain and the output impedance of a voltage-feedback operational amplifier. The DC voltage of the signal source \(V_{s}\) equals zero. For very low frequencies (at DC), the circuit is a voltage follower , hence the DC output voltage equals zero. A DC error voltage at the output due to the DC current in the noninverting input of the operational amplifier can be kept low by taking \(R\) as low as possible. If necessary, the DC error voltage can be tuned to zero with the aid of \(V_{s}\), or by adjusting the DC current source I1, which provides the current for the inverting input. The capacitor C1 should eliminate the voltage feedback over the frequency range of interest. The conditions for proper measurement are:

\[\begin{split}RC & \gg\frac{A_{v}(0)}{2\pi f_{\min}},\\ R & \gg R_{out},\end{split}\]

where \(A_{v}(0)\) is the expected maximum DC voltage gain of the operational amplifier, \(f_{\min}\) is the lowest frequency of interest (it cannot be zero) and \(R_{out}\) is the expected maximum value of the output resistance of the operational amplifier. The voltage gain \(A_{v}(s)\) is obtained as:

(91)#\[\begin{split}A_{v}(s) & =\frac{V_{o}}{V_{s}},\label{eq-Avs}\\ Z_{o}(s) & =\frac{V_{o}}{I_{o}}. \label{eq-Zos}\end{split}\]

Below is the syntax for the circuit from Fig. 277, equipped with the LT1677 operational amplifier:

 1A_v_Z_o
 2* file: A_v_Z_o.cir
 3* LTSpice netlist file
 4* Test bench for A_v and Z_o of a
 5* voltage-feedback operational amplifier
 6* Default settings:
 7*** measurement of A_v
 8*** +/-5V supply voltage
 9*** LT1677 operational amplifier
10.param vs=1         ;change to vs=0 for measurement of Z_o
11.param io=0         ;change to io=1 for measurement of Z_o
12V1 0 1 0 AC {vs} 0
13I2 0 3 0 AC {io} 0
14I1 0 2 0            ;Adjust this value for zero DC output voltage
15VP 4 0 5            ;Positive supply voltage
16VN 0 5 5            ;Negative supply voltage
17C1 2 0 1meg         ;Adjust this value if necessary
18R1 3 2 1meg         ;Adjust this value if necessary
19X1 1 2 4 5 3 LT1677 ;Device Under Test (DUT)
20.include LTC.lib    ;Library file with the subcircuit of DUT
21.ac dec 20 1 10meg  ;AC sweep over frequency range of interest 20 points/decade
22.save v(3)          ;Save the output voltage
23.end

Poles and zeros of \(A_{v}(s)\) and \(Z_{o}(s)\)#

Fig. 277 shows no difference between the test circuit for measurement of \(A_{v}(s)\) of \(Z_{o}(s)\). Only the values of two independent sources differ for the two different measurements. This implies that the voltage gain and the output impedance have the same poles. Only the zeros of both transfers ((91)) and (eq-Zos) differ. However, not all of the poles of the voltage gain may be observable when measuring the output impedance and vice versa. If a pole in the output impedance cannot be observed in the voltage gain , then the voltage gain has a zero at the (complex) frequency of that pole in the output impedance; and vice versa. The concept of observability of poles is discussed in section Determination of poles and zeros.

In SPICE \(A_{v}(s)\) can be modeled with a voltage-controlled voltage source of which the value is defined by a Laplace function. Below, you will find the syntax for an operational amplifier with a gain-bandwidth product \(GB\), a DC gain \(A_{0}\) and a first-order high-frequency roll-off. The circuit diagram is shown in Fig. 278.

 1* file: simpleOpamp.cir
 2* LTspice subcircuit for simple a 3-terminal OpAmp
 3* A voltage controlled voltage source models A_v(s)
 4* of a single-pole operational amplifier with
 5* a DC gain A_0=1Meg and a gain-bandwidth product GB=10MHz
 6* noninverting input: inP
 7* inverting input:    inN
 8* output:             out
 9* reference node:     0
10.subckt simpleopamp inP inN out params: A_0=1meg GB=10meg
11E1 out 0 inP inN laplace = {A_0/(1+s*A_0/2/pi/GB)}
12.ends  simpleopamp

In SPICE \(Z_{o}(s)\) can be modeled with network elements like noise-free resistors, capacitors and inductors. Noise-free resistors can be alternatively be modeled with voltage-controlled current sources, as shown in Fig. 279.

The dynamic behavior of \(Z_{o}(s)\) can be modeled by replacing the DC value \(\frac{1}{R}\) of the controlled source with a Laplace expression. Please notice that the poles of this expression will be the zeros of \(Z_{o}(s)\) and vice versa. Since Laplace expressions in LTSPICE cannot have more zeros than poles, this technique cannot be used for modeling capacitive behavior at the highest frequencies. This limitation can be solved by adding capacitors, or by using a current-controlled voltage source for impedance modeling, as shown in Fig. 280.

Below is the SPICE syntax for a parallel connection of a capacitor with capacitance \(C\) and a resistor with resistance \(R\), according to the model from Fig. 280:

 1* file: noiseFreeRC.cir
 2* LTspice subcircuit for a parallel connection of a noise-free resistor
 3* and a capacitor
 4* P: positive node
 5* N: negative node
 6* R: resistance
 7* C: capacitance
 8.subckt noisefreerc P N params: R=1 C=1
 9V1 1 N 0
10H1 P 1 V1 laplace = {R/1+s*R*C}
11.ends noisefreerc

Small-signal dynamic behavioral model for current-feedback opamps#

Fig. 281 shows the small-signal dynamic equivalent model of current-feedback operational amplifiers. The input impedances, output impedance and the differential-mode voltage transfer are modeled, either by using Laplace expressions or by using equivalent networks. This model suffices for evaluation of the small-signal frequency response, the small-signal impulse response and the small-signal step response of circuits with operational amplifiers.

../_images/OpAmp-CF-Small-Signal-Model.svg

Fig. 281 Simplified small-signal model of a current-feedback operational amplifier. The transimpedance gain \(A_z\) and the resistance \(R\) are usually specified in the data sheet.#

An overview of the model parameters is given in Table 25. Common-mode rejection, power supply rejection, noise, bias current and offset current and voltage as well as temperature effects are not modeled. Errors resulting from these performance limitations will be modeled at a later stage.

Table 25 Parameters of the small-signal model of the current feedback operational amplifier.#

Name

Description

\(g_{p}\)

Small-signal conductance between noninverting input and ground

\(C_{p}\)

Small-signal capacitance between noninverting input and ground

\(C_{pn}\)

Small-signal capacitance between noninverting input and inverting input

\(g_{m}\)

Transconductance of the input stage

\(A_{z}(s)\)

Laplace transform of the output stage’s transimpedance

\(Z_{o}(s)\)

Laplace transform of the output impedance

Determination of the transconductance of the input stage and the transimpedance of the output stage can be done with the aid of the test circuit from Fig. 282. The resistance \(R\) should be selected such that:

\[\begin{split}R & \gg R_{out},\\ R & \gg A_{z}(0).\end{split}\]

The transconductance \(g_{m}\), the transimpedance gain \(A_{z}(s)\) and the output impedance \(Z_{o}(s)\) are obtained as:

\[\begin{split}g_{m} & =\frac{I_{i}}{V_{i}},\\ A_{z}(s) & =\frac{V_{o}}{I_{i}},\\ Z_{o}(s) & =\frac{V_{o}}{I_{o}}.\end{split}\]

The DC current \(I_{B}\) needs to be adjusted to bring the DC output voltage in its linear operating region.

Rail-to-rail output operational amplifiers#

Many modern operational amplifiers have so-called rail-to-rail outputs. These devices can drive the load with voltages almost equal to the power supply voltages. Older operational amplifiers were not capable of doing so. This all has to do with the topology of the output stage used in operational amplifiers. Rail-to-rail output stages usually exhibit a high low-frequency output impedance. This implies that the low-frequency voltage gain of the amplifier strongly depends on the low-frequency value of the load impedance. Although the output impedance of the operational amplifier often plays a significant role in the dynamic behavior of its application, it is not always specified in the data sheets. For reliable designs, only devices that should be used of which the relevant performance aspects for the application are specified.

Noise behavior#

A simple noise model , with frequency-independent noise sources, can be obtained by adding input-equivalent noise sources to the small-signal dynamic model. Fig. 283 shows the way in which two uncorrelated equivalent input noise sources can be added.

Both sources have uniform power density spectra (white noise ). The spectra of the equivalent noise voltage and current source are given by \(S_{v}\) and \(S_{i}\), respectively:

\[\begin{split}S_{v} & =4kTR_{nv}\text{ }[\text{V}^{2}\text{/Hz}],\\ S_{i} & =\frac{4kT}{R_{ni}}\ [\text{A}^{2}\text{/Hz}].\end{split}\]

The values of the resistors from Fig. 283 are obtained from these spectra:

\[\begin{split}R_{nv} & =\frac{S_{v}}{4kT},\\ R_{ni} & =\frac{4kT}{S_{i}}.\end{split}\]

A SPICE model that includes \(1/f\) noise can be constructed with the aid of a PN diode . The noise model of a PN diode is briefly discussed in Chapter Noise in electronic systems.

Fig. 284 shows the model for a voltage noise source including \(1/f\) noise. The syntax for a SPICE subcircuit is listed below:

 1* file: vn.cir
 2* LTspice subcircuit of a voltage noise source for noise analysis
 3* sv: noise voltage density (noise-floor) in V/sqrt(Hz)
 4* fl: 1/f corner frequency
 5* Lowest frequency 100uHz
 6* For lower frequencies increase C1
 7.subckt vn 3 4 params: fl=1 sv=1n
 8I1 0 1 3.125u
 9D1 1 0 dnoise
10C1 1 2 1
11V1 2 0 0
12H1 3 4 V1 {sv*1e12}
13.model dnoise d kf={3.2e-19*fl} af=1
14.ends vn

For frequencies at which the impedance of the capacitor C1 is much smaller than the small signal impedance of the diode, the current noise of the diode flows through the voltage source V1. This current is converted into a voltage by the current-controlled voltage source H1.

The spectral density \(S_{i}\) of the noise current through V1 can be written as:

(92)#\[S_{i}=2qI_{D}\left( 1+\frac{\text{KF}I_{D}^{\text{AF}-1} }{2qf}\right) , \label{eq-1overfnoisediode}\]

where \(f\) is the frequency, KF\ and AF are model parameters, \(q\) the charge of the electron and \(I_{D}\) the DC current flowing through the diode. With \(I_{D}=3.125\mu\)A, we have \(2qI_{D}=10^{-24}\)A\(^{2}\)/Hz.

If AF \(=1\), equation (92) can be written as:

\[S_{i}=2qI_{D}\left( 1+\frac{f_{\ell}}{f}\right) ,\]

where the \(1/f\) corner frequency \(f_{\ell}\) equals:

\[f_{\ell}=\frac{\text{KF}}{2q}.\]

Hence, if we want a corner frequency \(f_{\ell}\), we need KF~ \(=2qf_{\ell}\).

Fig. 285 shows the model for a current noise source including \(1/f\) noise. The syntax for a SPICE subcircuit is listed below:

 1* file: in.cir
 2* LTspice subcircuit of a current noise source for noise analysis
 3* si: noise current density (noise-floor) in A/sqrt(Hz)
 4* fl: 1/f corner frequency
 5* Lowest frequency 100uHz
 6* For lower frequencies increase C1
 7.subckt in 3 4 params: fl=1 si=1p
 8I1 0 1 3.125u
 9D1 1 0 dnoise
10C1 1 2 1
11V1 2 0 0
12F1 3 4 V1 {si*1e12}
13.model dnoise d kf={3.2e-19*fl} af=1
14.ends in
../_images/noisyNullorSpice.svg

Fig. 286 LTSpice model of a nullor with added equivalent-input voltage and current noise sources.#

Fig. 286 shows an LTSPICE sub circuit for a nullor with added equivalent-input voltage and current noise sources. Both noise sources are uncorrelated and exhibit \(\frac{1}{f}\) noise. The LTSPICE syntax for this circuit has been listed below.

 1* Sub circuit nNoise
 2* LTspice subcircuit for a noisy nullor for noise analysis
 3* Lowest frequency 100uHz
 4* For lower frequencies increase C1 and C2
 5* Nodes:       in+ in- out+ out- 
 6.subckt nNoise inP inN outP outN params: Sv=1n Si=1p flv=1k fli=10k
 7* Parameters:
 8* Sv:  input noise voltage density (noise-floor) in V/sqrt(Hz)
 9* flv: 1/f corner frequency of voltage noise
10* Si:  input noise current density (noise-floor) in A/sqrt(Hz)
11* fli: 1/f corner frequency of current noise
12E1 outP 6 inP 5 1
13E2 outP outN 6 outN 1
14D1 1 3 DnoiseV
15D2 3 outN DnoiseI
16I1 outN 1 3.125u
17C1 1 2 1
18C2 3 4 1
19Vi 2 3 0
20Vv 4 outN 0
21F1 inP inN Vi {Si*1e12}
22H1 inN 5 Vv {Sv*1e12}
23.model DnoiseV D kf={3.2e-19*flv} af=1
24.model DnoiseI D kf={3.2e-19*fli} af=1
25.ends nNoise

PSRR and CMRR#

../_images/CM-PS-noise.svg

Fig. 287 Modeling of the influence of the finite CMRR and PSRR. The PSRR for the positive power supply and for the negative power supply have been modeled with the transfers \(PSRR+\) and \(PSRR-\), respectively. Frequency dependencies can easily be implemented with the aid of passive transfer networks or Laplace blocks to the inputs of the controlled sources.#

The \(PSSR\) and the \(CMRR\) are defined as the equivalent differential-mode input voltage sources that compensate for the output voltage change due to a change of the power supply voltage or of the common-mode input voltage, respectively. Modeling can be done according to Fig. 287. Complex networks or Laplace expressions can be used for modeling dynamic effects.

The model from Fig. 287 is not complete. This has already been discussed with the introduction of the two-port description for amplifiers. A complete model would also require current sources in parallel with the input, that are controlled by the power supply voltages and the common-mode voltage. Design data for these controlled sources, however, cannot be found in the data sheets, since the \(CMRR\) and the \(PSRR\) are only specified for voltage-driven inputs.

Bias and offset quantities#

Modeling of the static nonlinear behavior (see Table 21\ for parameters) can be done in various ways.

In many macro models , the bias current has been modeled with the aid of active devices. The offset current and the offset voltage have often been modeled with the aid of an independent current source and an independent voltage source, respectively. Unfortunately, this is not the correct way to do it. This is because the mean value of both of the offset quantities of a large number of devices tends to be zero.

The offset voltage source should be given statistical parameters for Monte Carlo analysis. Below the SPICE syntax for a voltage between node 1 and node 0 with a normal distribution with zero mean value and a standard deviation \(\sigma=10\)mV.

 1MCexample
 2
 3* file: MCexample.cir
 4* Example of a Monte Carlo simulation in LTspice
 5* vgauss :Voltage source with Gaussian distribution
 6* positive node = 1, negative node = 0
 7* vmean  :Mean value
 8* vsigma :Standard deviation
 9
10.params vmean=0 vsigma=10m
11vgauss 1 0 {vmean + gauss(vsigma)}
12.op
13.step param run 1 200 1 ;200 Monte Carlo runs
14.save V(1)
15.end

Bias current sources can be realized in a similar way and placed between each of the operational amplifier’s input terminals and the ground.

Modeling of other effects#

Modeling of voltage and current limitations and slew-rate is not always necessary. Macro models that incorporate these effects can become very large and may cause numerical problems during simulations. An alternative approach for verification of the influence of these nonlinear effects is to use linear models exclusively:

  1. Plot the derivative of the output voltage of the operational amplifier versus time and check if it exceeds the specification for the maximum slew rate

  2. Plot the output voltage versus the output current of the operational amplifier and check if it stays within the specified region. Do this by using the graphs of the output voltage versus output current of the data sheet.

  3. Plot the common-mode input voltage versus time and check if it stays within the specified region.

Macro models#

Macro models are behavioral models that are used for numeric simulation with SPICE-like simulators. Macro models for operational amplifiers were introduced in 1974 by Boyle, Cohn, Pederson and Solomon [43]. Macro models are comprised of fewer nonlinear elements than transistor-level models. This strongly facilitates fast computer simulations. The first macro models, however, only modeled a limited number of performance aspects. Simulation results with these models may strongly deviate from the real world behavior. Important improvements to these models have been suggested by Alexander and Derek [44].

Almost all operational amplifier manufacturers nowadays provide macro models for SPICE simulators. Unfortunately, the underlying equivalent circuit is not always given. Macro modeling with standardized models and with clearly defined model parameters, comparable to modeling of semiconductor devices, is not (yet) common practice. As a matter of fact, almost all operational amplifier manufacturers advice using the design information from the data sheets and making use of breadboards for testing specific applications.

It is strongly advised that designers who want to make use of macro models first evaluate whether the behavioral aspects of interest have been modeled correctly. This can be done by simulating test circuits identical to those given in the data sheets. Special attention has to be paid to the following aspects:

  1. Operational amplifiers do not have a specific ground terminal. However, if the macro model of an operational amplifier is formed according to Boyle, the return path for the output current is the ground node rather than the power supply terminals. In such cases simulations fail if the operational amplifier is operating at a relatively high voltage with respect to the ground. This is corrected in the model presented by Alexander and Bowers.

    An easy check as to whether the model has an internal connection to the ground is to sum all the currents flowing into the external nodes of the model when it is supplied from grounded voltage sources. This sum should, under all conditions, be zero; if not, some current is flowing to the ground.

  2. Most macro models have the offset voltage modeled with a fixed independent voltage source. This may result in canceling of offset voltages in circuits with multiple operational amplifiers. In practice, this will not occur, because offset voltages and currents of different devices do not match.

  3. The output impedance of the operational amplifier (often referred to as the “open-loop output impedance”) is not always correctly modeled, neither is it fully specified in the data sheet. This makes it difficult to predict the dynamic behavior under various loads. Performance evaluation with the aid of breadboards may be necessary.

  4. Rail-to-rail input operational amplifiers have two input stages. Related effects have not always been modeled in macro models.

  5. A general rule for robust and first-time right design is not to depend on device parameters that have not fully been specified. If, for example, the output impedance is not specified, but it is critical in the application, it is wise to look for a device that has it specified, or to build a test circuit and verify its influence.

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