SLiCAP device models#

The design method for amplifiers described in this book separates the design of the signal path from the design of the biasing. We will first design the signal path and then the biasing. Reasons for this are:

  1. The signal performance with ideal biasing should be within specifications and leave extra room for degradation due to biasing errors. If the biasing is designed together with the signal path, it is hard to find the cause of possible performance limitations. The performance of the signal path might then be out of specifications, while the focus may be on improvement of the biasing. If so, the designer is improving the biasing of an unfeasible amplifier, valuable design time gets lost and possible show stoppers may appear during a relatively late design phase.

  2. If the signal path of an amplifier shows unstable behavior, a numeric simulation may not be able to find the correct quiescent operating point due to convergence problems. As a consequence, the noise performance and the small-signal performance cannot be evaluated. This makes it hard or even impossible to find the causes for instability and trial and horror methods may be the only way to obtain stability. Only after stable behavior has been achieved, it may become clear that the performance is not as desired and valuable design time has gone lost.

Signal path and biasing#

Designing the signal path first does not mean that the designer shouldn’t account for biasing constraints while designing the signal path. Biasing considerations should be taken into account as early as possible. Especially in low-power applications, the selection of the device type, the operating conditions and the circuit topology are to a large extent driven by the feasibility of the biasing circuits that will be designed at a later stage. However, investigation of the adverse effects of the implementation of bias sources can very well be done without implementing them in the complete circuit.

One way to achieve this is to design the amplifier’s signal path using a linearized approach. In such an approach the frequency stability of an amplifier is investigated in operating points that occur during operation. Biasing circuitry can be omitted if the parameters of the small-signal models of the active devices can be related to the operating point. Operating points of interest can be estimated from the excursions and the rates of change of the signals that occur at the various nodes of the amplifier. By doing so, budgets for parasitic impedances that will be introduced by bias sources can be determined by inserting those impedances in the small-signal equivalent circuit and studying their effect independently from biasing changes.

Spice-like numeric simulators do not support this way of working. Those simulators can determine the small-signal parameters in an operating point only after a bias solution has been found. In other words: they need a biased circuit to work with. SLICAP however, is designed for this purpose.

SLiCAP parametric small-signal models#

SLICAP is a symbolic simulator that can be used at an early stage of the design for:

  • The design of the noise behavior

  • The design of the small-signal dynamic behavior

  • Deriving budgets for biasing imperfections

SLICAP does not need to find a DC solution to determine the small-signal parameters. It has built-in parameterized sub-circuits with small-signal models of active devices. Operating conditions and device geometry parameters can be passed to these sub-circuits, while technology parameters and device equations relate them to the small-signal parameters.

In the following sections, we will give a brief description of some device models that have been included in SLICAP. These sub-circuit definitions arebe found in the libraries supplied with SLICAP.

SLICAP is intended to be used to motivate early-stage design decisions and useful design information can be obtained with low complexity models.

BJT forward region, no saturation#

The subcircuit BJTV4 is a parameterized small-signal model of a four-terminal vertical BJT. It can be used for simulation of the small-signal behavior under variation of the collector current \(I_{C}\) and the collector-emitter voltage \(V_{CE}\). The transconductance \(g_{m}\left( I_{C}\right) \) of the device is modeled for operation in the forward active region (no saturation). The base-emitter capacitance is modeled as a function of the collector current. The base-collector capacitance is modeled as a function of the collector-emitter voltage. For the sake of simplicity, the base resistance and the substrate capacitance are both set to zero.

The sub-circuit definition is found in the SLICAP library SLiCAP.lib.

The first line of the listing defines the name, the nodes and the parameters to be passed. The syntax is that of SPICE. Symbolic parameters that will be used in the sub-circuit are placed between curly brackets.

Lines 17 through 21 define the device equations for the small-signal parameters of this model. If desired, an equation for the substrate capacitance can be added here. Line 13 should then be changed to:

  • cs = {c_s}

Where c_s is the parameter name used in the equation. Other equations can be added or modified in a similar way.

../_images/modelQV.svg

Fig. 122 {SLICAP} small-signal dynamic model of the vertical BJT.#

Line 360 places the SLICAP small-signal model in the sub-circuit. The small-signal model is shown in Fig. 123. A full description of this model can be found in the SLICAP help file. The model itself is also defined as a SPICE subcircuit, it can be found in the SLICAP library: SLiCAPmodels.lib, together with the definition of global parameters and technology parameters. Please view the SLICAP manual for details.

NMOS EKV forward region, saturation range#

The sub-circuit CMOS18N is a parameterized small-signal model of an NMOS transistor in CMOS18 technology. It can be used for simulation of the small-signal behavior under variation of the channel current \(I_{DS}\). The small-signal parameters are a function of \(I_{DS},W\) and \(L\). The model equations cover operation in the saturation region from weak inversion until strong inversion including velocity saturation. Capacitances of the small-signal model are calculated from the oxide capacitance, the overlap capacitances and the zero-voltage depletion capacitances of the drain and the source. The voltage dependency of these capacitances has not been modeled, but the model can be extended, if desired. The model can easily be adapted to another technology by changing the technology parameters.

The CMOS 18 model parameters are defined in the SLICAP library SLiCAPmodels.lib.

The sub-circuit of the small-signal model (see Fig. 123) is defined in the same library file:

Symbolic parameters that will be used in the sub-circuit are placed between curly brackets.

The definition of the EKV model based on this sub circuit is found in the SLICAP library SLiCAP.lib.

Line 122 places the SLICAP small-signal model in the sub-circuit. The model is shown in Fig. 123. A full description of this model can be found in the SLICAP help file.

../_images/modelM.svg

Fig. 123 {SLICAP} small-signal dynamic model of the MOS transistor.#

Lines 125 through 132 define the parameter that will be used for symbolic analysis. In order to keep the symbolic expressions as compact as possible, simple single-parameter values have been used. If desired, numeric values or more complex expressions may as well be used.

Lines 135 through 150 give the device equations for the elements of the small-signal model. All intermediate parameters such as \(IC_{CRIT}\) in line 137, will be local parameters and appear in the main circuit as PARNAME_Xnnn, where PARNAME is the name of the parameter and Xnnn the name of the sub-circuit. In case of nested sub-circuits it will be PARNAME_XnnnXmmm, etc, where Xmmm is the sub-circuit that calls Xnnn. The values and expressions of these parameters can be listed in the HTML output or passed to the PYTHON workspace. Please notice that the thermal voltage \(U_{T}=\frac{kT}{q},\) is a global parameter. See the SLICAP help file for more information about the use of global and local parameters.

In section SLiCAP MOS device characteristics we will demonstrate in which way the device parameters can be plot against each other. This makes it possible to compare the small-signal element values obtained with SLICAP with those obtained from other simulators, and to adjust the SLICAP device equations and technology parameters to obtain optimum model correspondence.

NMOS EKV forward region, linear and saturation range#

The sub-circuit CMOS18N_V is a parameterized small-signal model of an NMOS transistor in CMOS18 technology. It can be used for simulation of the small-signal behavior under variation of the voltages \(V_{DB},\) \(V_{GB}\) and \(V_{SB}\). The small-signal parameters of the intrinsic transistor are modeled for forward operation in the linear region and in the saturation region from weak inversion until strong inversion including velocity saturation. The model equations for the elements of the small-signal model of the intrinsic transistor are those described in section MOS EKV Model. The extrinsic capacitances have been added as in the CMOS18N sub-circuit. This model can easily be adapted to another technology by changing the technology parameters.

The definition of this sub-circuit is listed below:

The first line of the listing defines the name, the nodes and the parameters to be passed. Line 159 places the SLICAP small-signal model in the sub-circuit. The model is shown in Fig. 123. Line 162 through 169 define the parameter values or equations that will be used for symbolic analysis. They are the same as in the CMOS18N sub-circuit.

Lines 172 through 204 give the device equations for the elements of the small-signal model. All intermediate parameters such as \(V_{A}\) in line 175, will be local parameters and appear in the main circuit as PARNAME_Xnnn, where PARNAME is the name of the parameter and Xnnn the name of the sub-circuit. In case of nested sub-circuits it will be PARNAME_XnnnXmmm, etc. Where Xmmm is the sub-circuit that calls Xnnn. The values and expressions of these parameters can be listed in the HTML output or passed to the PYTHON workspace. Please notice that the thermal voltage \(U_{T}=\frac{kT}{q}\), as well as \(\varepsilon_{0}\) and \(\varepsilon_{\operatorname{Si}O_{2}},\) are global parameters. Please see the SLICAP help file for more information about the use of global and local parameters.

The technology parameters are taken from the SLiCAP library SLiCAPmodels.lib (see description above). In section SLiCAP MOS device characteristics we will demonstrate in which way the device parameters can be plot against each other. This makes it possible to compare the small-signal element values obtained with SLICAP with those obtained from other simulators, and to adjust the SLICAP device equations and technology parameters to obtain optimum model correspondence.

SLiCAP MOS device characteristics#

The simulation results obtained with the SLICAP models can be adjusted to those obtained from measurements or from other simulators. This can be done by comparing graphs obtained from measurement or simulation with similar graphs obtained from SLICAP and adjust the SLICAP model parameters or model equations to reduce differences to an acceptable level.

In this section we will demonstrate how to plot the device characteristics with SLICAP.

Below is the listing of a SLICAP file that can been used for this purpose:

 1#!/usr/bin/env python2
 2# -*- coding: utf-8 -*-
 3"""
 4Created on Sun Jul  5 19:15:00 2020
 5
 6@author: anton
 7"""
 8
 9from SLiCAP import *
10t1 = time()
11
12prj = initProject('NMOS EKV plots') # Creates the SLiCAP libraries and the
13                             # project HTML index page
14
15fileName = 'mosEKVplotsN_V.cir'
16i1 = instruction()           # Creates an instance of an instruction object
17i1.setCircuit(fileName)      # Checks and defines the local circuit object and
18                             # sets the index page to the circuit index page                       
19htmlPage('Circuit data')
20netlist2html(fileName)
21elementData2html(i1.circuit)
22params2html(i1.circuit)
23
24# Put the plots on a page
25htmlPage('CMOS18 EKV model plots')
26
27i1.setDataType('params')
28i1.defPar('V_G', 1.8)
29i1.defPar('V_D', 1.8)
30
31i1.stepOn()
32i1.setStepVar('V_G')
33i1.setStepStart(0.6)
34i1.setStepStop(1.8)
35i1.setStepNum(6)
36i1.setStepMethod('lin')
37
38result = i1.execute()
39
40fig_Ids_Vds = plotSweep('IdsVds', '$I_{ds}(V_{ds})$', result, 0, 1.8, 50, sweepVar= 'V_D', xUnits = 'V', yVar = 'I_DS_X1', yScale = 'u', yUnits = 'A', funcType = 'param', show = True)
41fig2html(fig_Ids_Vds, 600)
42
43i1.setStepVar('V_D')
44result = i1.execute()
45
46fig_Ids_Vgs = plotSweep('IdsVgs', '$I_{ds}(V_{gs})$', result, 0, 1.8, 50, axisType = 'lin', sweepVar= 'V_G', xUnits = 'V', yVar = 'I_DS_X1', yScale = 'u', yUnits = 'A', funcType = 'param', show = True)
47fig2html(fig_Ids_Vgs, 600)
48
49fig_Ids_Vgs_Log = plotSweep('IdsVgsLog', '$I_{ds}(V_{gs})$', result, 0.01, 1.8, 50, axisType = 'semilogy', sweepVar= 'V_G', xUnits = 'V', yVar = 'I_DS_X1', yScale = 'u', yUnits = 'A', funcType = 'param', show = True)
50fig2html(fig_Ids_Vgs_Log, 600)
51
52fig_gm_Ids  = plotSweep('gmIds', '$g_m(I_{ds})$', result, 0, 1.8, 50, sweepVar= 'V_G', xVar = 'I_DS_X1', xScale = 'u', xUnits = 'A', yVar = 'g_m_X1', yScale = 'u', yUnits = 'S', funcType = 'param', show = True)
53fig2html(fig_gm_Ids, 600)
54
55fig_fT_Ids  = plotSweep('fTIds', '$f_{T}(I_{ds})$', result, 0, 1.8, 50, sweepVar= 'V_G', xVar = 'I_DS_X1', xScale = 'u', xUnits = 'A', yVar = 'f_T_X1', yScale = 'G', yUnits = 'Hz', funcType = 'param', show = True)
56fig2html(fig_fT_Ids, 600)
57
58fig_CissVg  = plotSweep('CissVg', '$c_{iss}(V_{gs})$', result, 0, 1.8, 50, sweepVar= 'V_G', xScale = '', xUnits = 'V', yVar = 'c_iss_X1', yScale = 'f', yUnits = 'F', funcType = 'param', show = True)
59fig2html(fig_CissVg, 600)
60
61t2=time()
62print(t2-t1,'s')
63
64LTspiceTraces =  LTspiceData2Traces('nmosChar.txt')
65traces2fig(LTspiceTraces, fig_Ids_Vgs)
66traces2fig(LTspiceTraces, fig_Ids_Vgs_Log)
67fig_Ids_Vgs.plot()
68fig_Ids_Vgs_Log.plot()
69
70figLT = plot('LTspiceIdsVgs', 'LTspice $I_{ds}(V_{gs})$', 'lin', LTspiceTraces, xName = '$V_{gs}$', xUnits = 'V', yName = '$I_{ds}$', yUnits = 'A', yScale = 'u', show = True)

SLICAP needs a circuit file to work with. Checking of a circuit creates an internal data structure with circuit parameters, which is needed for calculating parameter values. Checking of the circuit is performed by the instruction in line 1.

The circuit file itself is a very simple netlist comprising the transistor and the inclusion of the library with the model and initial parameter definitions. The listing of this circuit file is shown below:

1mosEKVplots
2* SLiCAP netlist file
3.include C18.lib
4X1 d g s 0 CMOS18N_V W={W} L={L} VD={V_D} VG={V_G} VS={V_S}
5.param V_D=1.8 V_G=0.5 V_S=0 W=220n L=180n
6.end

Line 4 of the circuit file assigns numeric values to the parameters to be passed to the sub-circuit. These values can be changed from within the PYTHON environment.

The instructions in lines 13 until 16 create an HTML page that shows the circuit data after the circuit has been checked. Fig. 125 and Fig. 126 show this HTML page. The parameter listing section shows the symbolic expression and the numeric value

of each parameter. Thanks to the math rendering they are easier to read than those in the sub-circuit definition in the library file. Please note that all local parameters of the sub-circuit X1 have X1 added to the subscript of their parameter name.

The graphs have been shown in section MOS EKV Model.

PMOS EKV models#

Similar as for NMOS devices, SLICAP has two sub-circuits for PMOS EKV models:

  1. CMOS18P

    The only difference with the NMOS sub-circuit CMOS18N is the technology section in the model definition. The direction of the drain current is not accounted for; the parameter \(ID\) should be given a negative value.

  2. CMOS18P_V

    Apart from the technology definition and the signs of the voltages, this sub-circuit is identical to its NMOS version: CMOS18N_V. Please notice that all voltages should be given a positive value with respect to the bulk voltage, similar as with the NMOS devices.