Junction Field Effect Transistors#
The principle of operation of a Junction Field effect device was first patented by J. E. Lilienfeld in 1925: [29]. In 1952 Shockley (see [30]) presented the theory for this device. The first working devices were reported by Dacey and Ross in 1953: [31].
Junction field effect transistors (JFETs) have a gate that is isolated by a depletion layer. They are available as discrete devices and in integrated circuit technology.
Fig. 90 shows how a P-channel JFET is realized in a bipolar integrated circuit process. N-channel and P-channel JFETs are also available as discrete devices.
Fig. 90 Cross section and device symbol of a p-channel JFET in (bipolar) integrated circuit technology#
JFET simulation model#
The SPICE simulation model for Junction field effect transistors is derived from the model proposed by Shichman and Hodges [32], it is shown in Fig. 91. The intrinsic JFET with connections \(g\), \(d^{\prime}\) and \(s^{\prime}\), is modeled with two diodes, two nonlinear capacitors and a voltage-controlled current source. Source and drain series resistances \(R_{s}\) and \(R_{d}\) complete the model.
Fig. 91 NJFET model according to Shichman and Hodges.#
Instantaneous behavior#
The instantaneous behavior of the intrinsic JFET is described by the \(I(V)\) relations of the two diodes and by a voltage-controlled channel current \(I_{d^{\prime}s^{\prime}}\left( V_{gs^{\prime}},V_{d^{\prime}s^{\prime} }\right) \).
The \(I(V)\) relations of the two diodes are
where \(I_{i}\) is the impact ionization current, which differs from zero in the forward saturation region (\(V_{gs^{\prime}}>V_{t}\) and \(V_{gd^{\prime}}<V_{t} \))
The saturation currents \(I_{s}\) is obtained from the model parameter IS, the temperature coefficient XTI, the temperature \(T\) and the scaling parameter AREA as
The reference temperature \(T_{0}\) is the temperature at which the parameters have been measured. Its default value in SPICE is \(300\)K. The scaling factor AREA scales the device as if AREA devices are connected in parallel.
The DC gate current \(I_{G}\) is the sum of the two diode currents:
The bulk resistances \(R_{d}\) and \(R_{s}\) are obtained from the model parameters RE and RS, respectively. They depend on the scaling factor AREA:
The voltage-controlled current \(I_{d^{\prime}s^{\prime}}\left( V_{gs^{\prime }},V_{d^{\prime}s^{\prime}}\right) \) is modeled differently for different operating regions:
Forward mode \((V_{d^{\prime}s^{\prime}}>0)\) cut-off region: \(V_{gs^{\prime}}<V_{t}\)
With the gate-source voltage \(V_{gs^{\prime}}\) below the threshold voltage \(V_{t}\) the device is turned off:
\[I_{d^{\prime}s^{\prime}}=0.\]Forward mode \((V_{d^{\prime}s^{\prime}}>0)\) linear region: \(V_{gs^{\prime}}>V_{t}\) and \(V_{gd^{\prime}}>V_{t}\)
When both the intrinsic gate-source voltage \(V_{gs^{\prime}}\) and the intrinsic gate-drain voltage \(V_{gd^{\prime}}\) are above threshold, the device operates in the so-called linear region. In the linear region the device can be considered a voltage-controlled resistor. The resistance of this resistor also depends on the intrinsic drain-source voltage
\[I_{d^{\prime}s^{\prime}}=\text{AREA.}\beta\left( 1+\text{LAMBDA.}V_{d^{\prime}s^{\prime}}\right) V_{d^{\prime }s^{\prime}}\left( 2\left( V_{gs^{\prime}}-V_{t}\right) -V_{d^{\prime }s^{\prime}}\right) .\]Forward mode \((V_{d^{\prime}s^{\prime}}>0)\) saturation region: \(V_{gs^{\prime}}>V_{t}\) and \(V_{gd^{\prime}}<V_{t}\)
With the intrinsic gate-source voltage \(V_{gs^{\prime}}\) above threshold and the intrinsic gate-drain voltage \(V_{gd^{\prime}}\) below threshold the device acts as a voltage-controlled current source. The drain-source current depends approximately quadratically on the so-called effective intrinsic gate-source voltage \(V_{gs^{\prime}}-V_{t}\):
\[I_{d^{\prime}s^{\prime}}=\text{AREA.}\beta\left( 1+\text{LAMBDA.}V_{d^{\prime}s^{\prime}}\right) \left( V_{gs^{\prime}}-V_{t}\right) ^{2}.\]For reverse mode operation \((V_{d^{\prime}s^{\prime}}<0)\) the above conditions and equations hold after the source and the drain connections have been swapped.
The transconductance factor \(\beta\) [A\(^{2}\)/V] and its temperature dependency is modeled with two parameters BETA and BETATC:
The threshold voltage \(V_{t}\) is defined by the parameter VTO, its temperature coefficient VTOTC and the temperature \(T\):
The parameter LAMBDA models the change of the drain-source current due to a change of the channel voltage \(V_{d^{\prime}s^{\prime}}\) of the intrinsic JFET, in a similar way as the Early voltage for a bipolar transistor. The Shichman and Hodges model does not have a smooth transition between the cut-off region, the linear region and the saturation region. This results in discontinuities in the \(dI(V)/dV\) characteristic, which may result in unreliable distortion simulation results with signals that show large drain-source voltage excursions.
Modeling of dynamic effects#
The charge storage in JFETs is modeled by the voltage-dependent junction capacitances. The built-in junction voltage PB, the grading coefficient M and the zero bias depletion capacitances CGS, CDS and FC are associated parameters. Similar as with bipolar transistors the parameter FC is used for modeling of the capacitances in case of a forward-biased junction. The capacitances \(C_{gs^{\prime}}\) and \(C_{gd^{\prime}}\) are proportional with the scaling constant AREA. The model equations are
Small-signal equivalent circuit#
The small-signal equivalent circuit of the JFET is shown in Fig. 92. It is obtained from linearization of the model from Fig. 91 in an operating point \(Q\ ,\) defined by \(V_{GS},\) \(V_{DS},\) \(I_{G}\) and \(I_{DS}.\)
Fig. 92 JFET small-signal equivalent circuit.#
The parameter values are
\(c_{gs^{\prime}}=\left. C_{gs^{\prime}}\right\vert _{Q};\) |
\(r_{ds}=\left. \frac{\partial V_{d^{\prime}s^{\prime}}}{\partial I_{ds}}\right\vert _{Q};\) |
\(R_{d}=\frac{\text{RD}}{\text{AREA}};\) |
\(c_{gs^{\prime}}=\left. C_{gs^{\prime}}\right\vert _{Q};\) |
\(g_{m}=\left. \frac{\partial I_{d^{\prime}s^{\prime}}}{\partial V_{gs^{\prime}}}\right\vert _{Q};\) |
\(R_{s}=\frac{\text{RS}}{\text{AREA}}.\) |
Stationary noise model#
Fig. 92 shows the small-signal noise model of the JFET. It models noise associated with the bulk resistances and with the channel current.
Fig. 93 JFET small-signal equivalent circuit with stationary noise sources.#
The thermal noise of the two bulk resistors is given by
The shot noise \(i_{g}\) associated with the gate current has a spectral density
The thermal noise of the channel current shows has a \(\frac{1}{f}\) component:
This can be denoted as
where \(f_{\ell}\) is the corner frequency for the \(\frac{1}{f}\) noise. Low noise JFETs can have \(f_{\ell}\) below 100Hz. This cut-off frequency strongly depends on the technology and may as well exceed 10kHz.
Device parameters#
In this section we will give an overview of the SPICE model parameters for junction FETs. The following model types are supported:
model |
description |
NJF |
N-channel Junction Field Effect Transistor |
PJF |
P-channel Junction Field Effect Transistor |
Table 10 gives an overview of the SPICE JFET model parameters. The scaling factor AREA scales the device as if AREA devices are connected in parallel. Some SPICE versions have additional parameters. The parameters listed in table Table 10 are supported by LTSPICE, SIMETRIX and PSPICE.
name |
description |
unit |
default |
VTO |
pinch-off voltage |
V |
\(-2\) |
BETA |
transconductance factor |
A/V\(^{2}\) |
\(10^{-4}\) |
LAMBDA |
channel length modulation coefficient |
1/V |
\(0\) |
RD |
drain bulk resistance |
\(\Omega\) |
\(0\) |
RS |
source bulk resistance |
\(\Omega\) |
\(0\) |
IS |
gate junction saturation current |
A |
\(10^{-14}\) |
CGS |
zero-bias gate-source capacitance |
F |
\(0\) |
CGD |
zero-bias gate-drain capacitance |
F |
\(0\) |
PB |
built-in gate junction potential |
V |
\(1\) |
FC |
forward bias depl. cap. coefficient |
V |
\(0.5\) |
AF |
flicker noise exponent |
\(1\) |
|
KF |
flicker-noise coefficient |
\(0\) |
|
N |
gate junction emission coefficient |
\(1\) |
|
NR |
gate junction recombination coefficient |
\(2\) |
|
XTI |
saturation current temperature coefficient |
\(3\) |
|
ISR |
recombination saturation current |
A |
\(0\) |
ALPHA |
ionization coefficient |
1/V |
\(0\) |
VK |
ionization knee voltage |
V |
\(0\) |
M |
junction grading coefficient |
\(0.5\) |
|
VTOTC |
vto temperature coefficient |
V/\(^{\text{o}}\)C |
\(0\) |
BETATC |
beta exponential temperature coefficient |
%/\(^{\text{o}} \)C |
\(0\) |
JFET simulated device characteristics#
Fig. 94 shows a test bench for simulation of the device characteristics. The netlist file is shown below:
1DCchars
2* FILE: myNJF_DCchars.cir
3* LTspice circuit file
4VGS 1 0 0
5VDS 2 0 0
6J1 2 1 0 myNJF
7.model myNJF NJF Beta=25m Betatce=-.5 Rd=1 Rs=10 Lambda=40m
8+ Vto=-.6 Vtotc=-2m Is=250p Isr=1p N=1 Nr=2 Xti=3 Alpha=-1m
9+ Vk=30 Cgd=5p M=.6 Pb=.5 Fc=.5 Cgs=5p Kf=50a Af=1
10* Syntax of nested DC analysis depends on spice version
11*.dc VDS 0 5 10m VGS -0.6 0 0.1
12.dc VGS -0.6 0 10m VDS 1 5 1
13.end
14
Fig. 79 shows the forward transfer characteristics and the output characteristics of the junction FET myNJF. The transfer characteristics in the forward saturation region and with LAMBDA \(=0\) can be approximated by
Fig. 95 DC transfer characteristics and output characteristics of “myNJF”, obtained from simulation with the circuit from Fig. 94.#
Saturation current#
When \(V_{gs}=0\) the drain current equals the so-called saturation current \(I_{dss}.\) Since the gate-source junction of a JFET should be reversely biased, \(I_{dss}\) is the largest possible drain current; with LAMBDA \(=0\), it equals
Cut-off frequency#
The cut-off frequency of a JFET is defined in a similar way as with bipolar transistors. The unity gain frequency for the current gain is found as
Where \(C_{iss}\) is defined as the input capacitance with the output shorted.
Operating point information#
Similar as with the bipolar transistor, the current drive capability and the voltage drive capability of a JFET depend on the DC drain current \(I_{D}\) and the drain-source voltage \(V_{DS}\), respectively. Many other performance aspects, such as, the noise performance, and the cut-off frequency also show a direct relation with the drain current. As a consequence, we often want to fix the operating point by means of fixing \(I_{D}\) and \(V_{DS}\).
A method for fixing the operating point of nonlinear resistive multi-terminal devices has been discussed in Chapter Amplification Mechanism. According to the presented method, fixing the operating point of a JFET by means of \(I_{D}\) and \(V_{DS},\) requires the addition a voltage source \(V_{DS}\) between the drain and the output, and a current source \(I_{D}\) that flows from the source to the drain.
In order to obtain zero output voltage and zero output current for all DC input and output terminations, a voltage source \(V_{GS}\) has to be placed in series with the gate, and a current source \(I_{G}\) has to be connected in parallel with the gate-source junction. The values of these sources depend on the required values of \(I_{D}\) and \(V_{DS}\), on the DC characteristics of the device and on the operating temperature. They can be determined with the aid of the circuit from Fig. 96. The nullator at the output port (drain-source) sets the condition for zero output voltage and zero output current, while the norator at the input port delivers the correct driving quantities to satisfy these conditions. Although the nullor is not available in SPICE, it can be implemented with the aid of two unity-gain voltage-controlled voltage sources as illustrated in this figure.
SPICE returns the small-signal parameters in a certain operating point as the result of an operating point analysis (.op statement). The parameters returned depend on the device model and the SPICE version. Tabel-JFETOPversions gives an overview of the small-signal parameters of the JFET returned by different SPICE versions.
name |
\textbf{description }(see Fig. 92) |
LTspice |
SIMetrix |
Pspice |
ngspice |
\(c_{gd}\) |
Gate-drain capacitance |
Cgd |
CGDt |
CGD |
|
\(c_{gs}\) |
Gate-source capacitance |
Cgs |
CGSt |
CGS |
|
\(g_{m}\) |
Forward transconductance |
Gm |
GM |
GM |
gm |
\(g_{\pi}\) |
Input conductance |
ggs |
|||
\(g_{ds}\) |
Output conductance |
Gds |
GDS |
gds |
|
\(I_{G}\) |
DC gate current |
IG |
ig |
||
\(I_{D}\) |
DC drain current |
Id |
ID |
ID |
id |
\(I_{S}\) |
DC source current |
IS |
is |
||
\(I_{GD}\) |
DC drain-gate current |
igd |
|||
\(P\) |
DC power dissipation |
Power |
|||
\(V_{GS}\) |
DC gate-source voltage |
Vgs |
VGS |
vgs |
|
\(V_{GD}\) |
DC gate-drain voltage |
vgd |
|||
\(V_{DS}\) |
DC drain-source |
Vds |
VDS |
||
SIMETRIX does not output data for the output conductance \(g_{ds}\) and the operating voltages. However, the latter can be obtained from the nodal voltages. NGSPICE does not provide data for the small-signal capacitances.
Simplified models for hand calculation#
The complete SPICE models are suitable for numerical simulations but are too complex to provide design information. For this purpose we need simplified models that are suitable for hand calculations. In this section we will derive such models. We will introduce a large signal static model, a small-signal dynamic model and a noise model that can be used for determination of the operating point, the dynamic small-signal transfer and the noise behavior of the JFET, respectively. We will only discuss the active forward saturation region.
DC behavior#
The instantaneous large-signal model that is suitable for hand calculations is depicted in Fig. 97. The diodes, the capacitances and the bulk resistances have been omitted and only the nonlinear voltage-controlled current source remains. The current of the controlled source depends on both the gate-source and the drain-source voltage. Different expressions must be used for the cut-off region, the linear region and the saturated region.
Forward mode \((V_{DS}>0),\) cut-off region: \(V_{GS}-\)VTO\(<0\)
\[I_{DS}=0.\]Forward mode \((V_{DS}>0),\) linear region: \(V_{DS}<V_{GS} -\text{VTO}\), or, alternatively: \(V_{DG}<-\)VTO
\[I_{DS}=\text{AREA.BETA}\left( 1+\text{LAMBDA}V_{DS}\right) V_{DS}2\left( V_{GS}-\text{VTO}\right) -V_{DS}).\]Forward mode \((V_{DS}>0),\) saturation region: \(0\leq V_{GS} -\text{VTO}\leq V_{DS}\), or, alternatively: $V_{DG}
-\text{VTO}$
\[I_{DS}=\text{AREA.BETA}\left( 1+\text{LAMBDA}V_{DS}\right) \left( V_{GS}-\text{VTO}\right) ^{2}.\]
Small-signal dynamic behavior#
The simplified small-signal dynamic model is shown in Fig. 98.
param. |
cut-off. |
linear region |
saturation region |
\(C_{gs}\) |
\(\text{AREA.CGS}\) |
{\small see expression (26)} |
{\small see expression (26)} |
\(C_{ds}\) |
\(\text{AREA.CDS}\) |
{\small see expression |
{\small see expression |
\(g_{m}\) |
\(0\) |
\(2\)AREA.BETA\(V_{DS}\) |
\(2\text{AREA.BETA }\left( V_{GS}-\text{VTO}\right) \) |
\(=2\sqrt{\text{AREA.BETA}I_{DS}}\) |
|||
\(g_{ds}\) |
\(0\) |
\(2\)AREA.BETA\(\left( V_{GS}-\text{VTO }\right) \) |
LAMBDA\(I_{DS}\) |
voltage controlled resistor; |
(LAMBDA \(\ll1\)) |
||
approx. for \(V_{DS}=0\) |
|||
The parameters can be obtained from a SPICE operating point analysis. They can also be estimated from the device parameters and the DC operating voltages and currents. The equations are shown in Table 12.
Noise model#
A simplified noise model is shown in Fig. 99. The noise of the bulk resistances \(R_{s}\) and \(R_{d}\) is omitted, while the remaining noise sources are added to the simplified hybrid-\(\pi\) equivalent circuit from Fig. 98.
Determination of hybrid-\(\pi\) parameters from simulation#
The small-signal parameters can also be obtained from simulation. Fig. 89 shows the simulation test bench for determination of the small-signal hybrid-\(\pi\) parameters.
The procedure is as follows:
Bias the JFET in the required operating point with the aid of the \(DC\) voltage sources \(V_{GS}\) and \(V_{DS}\). The value of \(V_{GS}\) can be obtained from an operating point simulation with the test bench from Fig. 96.
Make \(V_{AC1}=1,0\) (magnitude \(1\), phase \(0\)) and \(V_{AC2}=0\) and perform an AC analysis over the frequency range of interest
Obtain approximations the values of the following parameters
\[\begin{split}g_{m} & =\operatorname{Re}\{-I(V_{AC2})\},\\ c_{gs}+c_{ds} & =\frac{\operatorname{Im}\{-I(V_{AC1})\}}{2\pi f}.\end{split}\]Make \(V_{AC1}=0\) and \(V_{AC2}=1,0\) (magnitude \(1\), phase \(0\))
Obtain approximations for the values of the following parameters
\[\begin{split}r_{o} & =\frac{1}{\operatorname{Re}\{-I(V_{AC2})\}},\\ c_{ds} & =\frac{\operatorname{Im}\{I(V_{AC1})\}}{2\pi f}.\end{split}\]