07-01-2025: Design of biasing#
Lecture: EE4109-13
Location: Pulse Hall 7 (33.A2.200)
Time: 15:45 - 17:30
Biasing design considerations#
Biasing proceeds in two steps:
Design of the biasing with ideal voltage and current sources; this comprises the following actions:
Biasing sources will be added to the transistors: four per transistor, as discussed in Chapter 3
The power supply is added to the circuit
Amplifier ports that should be referenced to the power supply are connected to one terminal of the power supply (called: signal reference)
Bias current sources are redirected via the power supply, such that they can be impelemnted with passive elements
The number of voltage sources in series with the signal path is minimized, by choosing N or P devices, by replacing CS with CD stages, or by changing the drain-source operating voltages
Design of the bias current and voltage sources
A sufficiently accurate, stable and low-noise voltage or current reference (can be the power supply) is used as starting point for the design
All other sources are derived from this reference, and their design procedure resembles that of an amplifier.
Define the requirements
Architecture
Floating current source
Current source (connected to positive supply)
Current sink (connected to negative supply)
Floating voltage source
Voltage source connected to positive supply
Voltage source connected to negative supply
Static V-I characterisics
Current source: current to be deliverd and voltage handling capability
Voltage source: voltage to be delivered and current handling capability
Accuracy, temperature stability
Noise
Associated current noise or voltage noise in case of a current source or voltage source, respectively.
Impedance
Small-signal source impedance
Parasitic impedances from floating terminals to signal reference (substrate)
Find an operating principle
Voltage source character
Current source character
Apply design techniques to improve performance/cost ratio
Negative Feedback
Compensation/Balancing
Filtering
etc.
Guided group exersise#
We will consider various biasing implementations for the single-stage and the dual stage solution of the hearing loop receive amplifier.
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