Design of a hearing loop system in CMOS18 technology#
Application description#
The presentation A hearing loop system in CMOS18 technology shows the application and the high level requirements of the complete hearing aid system.
Hearing loop receive coil amplifier A1#
The hearing loop sub system converts the magnetic field of a current-driven loop antenna into an audio signal. Hearing aid devices automatically switch from microphone reception to the hearing loop reception if correlation betweeen the signal at the output of the amplifier A1 and the output of the microphone is sufficently large.
Hence, the gain and the frequency characteristics of A1 should be such that its output signal corresponds with that of the microphone.
ADC driver A2#
The ADC driver amplifier A2 drives the 10 pF input capacitance of the ADC to a level of 0.9 Vpp at 110 dB SPL audio input.
Loudspeaker driver A3#
Amplifier A3 drives the loudspeaker that must produce 110 dBSPL when driven from a peak-peak voltage equal to the fully charged battery voltage.
Links#
Design excercise 4#
Show stopper value for the integrated noise at the output of the receive coil amplifier#
The signal at the output of the integrating voltage amplifier A1, closely approximates that of the microphone. The input referred noise level of the hearing loop system must be at least 30 dBSPL. This is about 5 dB more than that of the microphone. Hence, the integrated noise at the output of A1 can be equivalent to maximally 30 dBSPL at the microphone input.
30 dBSPL sound level at the input of the microphone corresponds with \(20 \times 10^{-6} \times 10^{\frac{30-34.5}{20}} = 11.9 \mu V_{RMS}\).
\(g_m\) and \(c_{iss}\) of an input stage NMOS#
The source impedance of amplifier A1 consists of the parallel connection of the hearing loop receive coil and a damping resistor of 10 k:math:Omega. The hearing loop receiver has an integrating characteristic; its idealized gain has been determined as \(\frac{62.8\times 10^3}{s}\). The figure below shows the model of an idealized voltage integrator with equaivalent noise sources of a MOS transistor.
The product of the required transconductance \(g_m\) and the required input capacitance \(c_{iss}\) of the input stage can be taken as a measure for the costs.
A SLiCAP script calculates \(g_m\) and \(c_{iss}\) such that the DIN A weighted output noise is according for specifications for minimum costs.
Please view the HTML design report.
\(W\), \(L\), and \(I_{DS}\) of an input stage NMOS#
The relations between the small-signal parameters \(g_m\) and \(c_{iss}\), the device geometry parameters \(W\) and \(L\), and the operating current \(ID\), are defined in the model N18_noise in the CMOS-1.lib file. A SLiCAP script calculates \(W\), \(L\), and \(ID\) such that the DIN A weighted output noise is according for specifications for minimum costs.
Please view the HTML design report.
SLiCAP noise performance verification#
Please view the HTML design report.